Multiprocessor systems on chips

Ahmed Jerraya, Wayne Wolf9780123852519, 012385251X

Modern system-on-chip (SoC) design shows a clear trend toward integration of multiple processor cores on a single chip. Designing a multiprocessor system-on-chip (MPSOC) requires an understanding of the various design styles and techniques used in the multiprocessor. Understanding the application area of the MPSOC is also critical to making proper tradeoffs and design decisions.

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Table of contents :
TeamLiB……Page 1
Cover……Page 2
Contents……Page 9
About the Editors……Page 8
Preface……Page 21
1.2 What are MPSoCs……Page 22
1.3 Why MPSoCs?……Page 26
1.4 Challenges……Page 31
1.5 Design Methodologies……Page 32
1.6 Hardware Architectures……Page 34
1.7 Software……Page 35
1.8 The Rest of the Book……Page 39
PART I HARDWARE……Page 40
2.1 Introduction……Page 42
2.2 Energy-Aware Processor Design……Page 44
2.3 Energy-Aware Memory System Design……Page 48
2.4 Energy-Aware On-Chip Communication System Design……Page 55
2.5 Energy-Aware Software……Page 65
2.6 Conclusions……Page 67
3.1 Introduction……Page 70
3.2 Signal Transmission on Chip……Page 73
3.3 Micronetwork Architecture and Control……Page 78
3.4 Software Layers……Page 94
3.5 Conclusions……Page 101
4.1 Introduction……Page 102
4.2 Embedded Versus High-Performance Processors: A Common Foundation……Page 103
4.3 Pipelining Techniques……Page 106
4.4 Survey of General-purpose 32-bit Embedded Microprocessors……Page 117
4.5 Virtual Simple Architecture (VISA): Integrating Non-Determinism Without Undermining Safety……Page 129
4.6 Conclusions……Page 131
5.1 Introduction……Page 134
5.2 The Limitations of Traditional ASIC Design……Page 139
5.3 Extensible Processors as an Alternative to RTL……Page 143
5.4 Toward Multiple-Processor SoCs……Page 163
5.5 Processors and Disruptive Technology……Page 168
5.6 Conclusions……Page 170
6.1 Introduction……Page 174
6.2 Architecture Component Performance Modeling and Analysis……Page 182
6.3 Process Execution Modeling……Page 189
6.4 Modeling Shared Resources……Page 192
6.5 Global Performance Analysis……Page 200
6.6 Conclusions……Page 206
7.1 Introduction……Page 208
7.2 On-Chip Communication Architectures……Page 210
7.3 System-Level Analysis for Designing Communication Architectures……Page 215
7.4 Design Space Exploration for Customizing Communication Architectures……Page 224
7.5 Adaptive Communication Architectures……Page 231
7.6 Communication Architectures for Energy/Battery-Efficient Systems……Page 237
7.7 Conclusions……Page 243
8.1 Introduction……Page 244
8.2 Background……Page 246
8.3 Modeling of Dataflow Networks……Page 254
8.4 Case Study: Hiperlan/2 Application……Page 256
8.5 The Architectural Platform……Page 259
8.6 Results……Page 264
8.7 Conclusions……Page 269
PART II SOFTWARE……Page 270
9.1 Introduction and Motivation……Page 272
9.2 Memory Architectures……Page 273
9.3 Compiler Support……Page 290
9.4 Conclusions……Page 302
10.1 Introduction……Page 304
10.2 Basic Concepts and Terminology……Page 307
10.3 Basic System Model……Page 311
10.4 Uniprocessor Systems……Page 313
10.5 Multiprocessor Systems……Page 324
10.6 Summary……Page 332
11.1 Introduction……Page 334
11.2 Platform Based Design……Page 335
11.3 Related Work……Page 336
11.4 Target Platform Architecture and Model……Page 340
11.5 Task Concurrency Management……Page 341
11.6 3D Rendering QoS Application……Page 348
11.7 Experimental Results……Page 350
11.8 Conclusions……Page 356
12.1 Introduction……Page 358
12.2 Examples……Page 360
12.3 Open Problems……Page 371
12.4 Conclusions……Page 375
PART III METHODOLOGY AND APPLICATIONS……Page 376
13.1 From ASIC to System and Network on Chip……Page 378
13.2 Basics for MPSoC Design……Page 380
13.3 Design Models for Component Abstraction……Page 388
13.4 Component-Based Design Environment……Page 392
13.5 Component-Based Design of a VDSL Application……Page 406
13.6 Conclusions……Page 413
14.1 Introduction……Page 416
14.2 Multimedia Algorithms……Page 417
14.3 Architectural Approaches to Video Processing……Page 423
14.4 Optimal CPU Configurations and Interconnections……Page 427
14.5 The Challenges of SoC Integration and IP Reuse……Page 431
14.6 The Panacea/Promise of Platform-Based Design……Page 434
14.7 The Ever Critical Communication Bus Structures……Page 437
14.8 Design for Testability……Page 442
14.9 Application-Driven Architecture Design……Page 444
14.10 Conclusions……Page 450
15.1 Introduction……Page 452
15.2 MoC Classifications……Page 458
15.3 Models of Computation and Computer Models……Page 469
15.4 Modeling Environment for Software and Hardware……Page 472
15.5 Conclusions……Page 483
16.1 Introduction……Page 486
16.2 The Metropolis Meta-Model……Page 494
16.3 Tools……Page 502
16.4 The Picture-in-Picture Design Example……Page 505
16.5 Conclusions……Page 516
B……Page 518
C……Page 519
D……Page 521
H……Page 523
L……Page 524
M……Page 525
O……Page 526
P……Page 527
S……Page 528
T……Page 530
U……Page 531
Y……Page 532
References……Page 534
Contributor Biographies……Page 578
A……Page 588
C……Page 589
E……Page 591
F……Page 592
I……Page 593
M……Page 594
O……Page 596
P……Page 597
R……Page 598
S……Page 599
T……Page 600
W……Page 601
Y……Page 602