Advances in Computer Systems Architecture: 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003. Proceedings

Tetsuya Sato, Hitoshi Murai (auth.), Amos Omondi, Stanislav Sedukhin (eds.)354020122X, 9783540201229

This conference marked the ?rst time that the Asia-Paci?c Computer Systems Architecture Conference was held outside Australasia (i. e. Australia and New Zealand), and was, we hope, the start of what will be a regular event. The conference started in 1992 as a workshop for computer architects in Australia and subsequently developed into a full-?edged conference covering Austra- sia. Two additional major changes led to the present conference. The ?rst was a change from “computer architecture” to “computer systems architecture”, a change that recognized the importance and close relationship to computer arc- tecture of certain levels of software (e. g. operating systems and compilers) and of other areas (e. g. computer networks). The second change, which re?ected the increasing number of papers being submitted from Asia, was the replacement of “Australasia” with “Asia-Paci?c”. This year’s event was therefore particularly signi?cant, in that it marked the beginning of a truly “Asia-Paci?c” conference. It is intended that in the future the conference venue will alternate between Asia and Australia/New Zealand and, although still small, we hope that in time the conference will develop into a major one that represents Asia to the same – tent as existing major computer-architecture conferences in North America and Europe represent those regions.

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Table of contents :
Front Matter….Pages –
How Can the Earth Simulator Impact on Human Activities….Pages 1-7
Toward Architecting and Designing Novel Computers….Pages 8-13
Designing Ultra-large Instruction Issue Windows….Pages 14-20
Multi-threaded Microprocessors – Evolution or Revolution….Pages 21-45
The Development of System Software for Parallel Supercomputers….Pages 46-53
Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA….Pages 54-68
Reconfigurable Logic: A Saviour for Experimental Computer Architecture Research….Pages 69-85
Design and Implementation of Java Processors….Pages 86-96
MOOSS: CPU Architecture with Memory Protection and Support for OOP….Pages 97-111
Reducing Access Count to Register-Files through Operand Reuse….Pages 112-121
SimAlpha Version 1.0: Simple and Readable Alpha Processor Simulator….Pages 122-136
Towards an Asynchronous MIPS Processor….Pages 137-150
On Implementing High Level Concurrency in Java….Pages 151-165
Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures….Pages 166-179
A Novel Architecture for Genomic Sequence Searching and Alignment….Pages 180-192
A Reconfigurable Multi-threaded Architecture Model….Pages 193-207
Reconfigurable Instruction-Level Parallel Processor Architecture….Pages 208-220
Mapping Applications to a Coarse Grain Reconfigurable System….Pages 221-235
Packing with Boundary Constraints for a Reconfigurable Operating System….Pages 236-245
Arithmetic Circuits Combining Residue and Signed-Digit Representations….Pages 246-257
A New On-the-fly Summation Algorithm….Pages 258-267
State Reordering for Low Power Combinational Logic….Pages 268-276
User-Level Management of Kernel Memory….Pages 277-289
Variable Radix Page Table: A Page Table for Modern Architectures….Pages 290-304
L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy….Pages 305-319
Legba: Fast Hardware Support for Fine-Grained Protection….Pages 320-336
Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem….Pages 337-351
Implementation of Fast Address-Space Switching and TLB Sharing on the StrongARM Processor….Pages 352-364
Performance of the Achilles Router….Pages 365-379
Latency Improvement in Virtual Multicasting….Pages 380-394
A Router Architecture to Achieve Link Rate Throughput in Suburban Ad-hoc Networks….Pages 395-407
Back Matter….Pages –