Passive Micro-Optical Alignment Methods

Robert A. Boudreau, Sharon M. Boudreau9780824707064, 0824707060

Optical alignment is the most expensive step in manufacturing micro-optical components and fiber optics, but here contributors from companies in the US, Europe, and Japan describe a new low-cost approach known as passive alignment, which is just beginning its migration from the laboratory bench to the production line. They present various mechanical and optical methods that allow the micro-optics to be positioned and bound without having to power the device being manufactured. They also review utilities for passive alignment. Among specific topics are soldering technology for opto-electronic packaging, a low-cost plastic packaged module, and the Monte Carlo analysis of passive alignment methods.

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Table of contents :
Passive Micro-Optical Alignment Methods……Page 7
Preface……Page 9
About the Editors……Page 11
Contributors……Page 12
Contents……Page 14
1.1 DEFINITIONS OF TERMS……Page 16
1.2 ALIGNMENT OF ARRAYS……Page 18
1.3 ALIGNMENT OF TRANSMITTERS AND RECEIVERS……Page 23
1.4 LARGE-SPOT LASERS……Page 27
1.5 MICRO-OPTICS……Page 29
1.6 LIGA AND HIGH-ASPECT STRUCTURES FOR PASSIVE ALIGNMENT……Page 30
1.7 THE SUSS DIEBONDER……Page 32
1.8 FINETECH’S FINEPLACER LAMBDA BONDER……Page 34
1.9 SELF-ALIGNMENT……Page 35
1.10 PASSIVE ALIGNMENT IN PLCS……Page 37
1.11 MISCELLANEOUS APPLICATIONS……Page 38
REFERENCES……Page 40
Section 1: Mechanical Passive Alignment……Page 44
2.1 INTRODUCTION……Page 45
2.2 HISTORICAL PERSPECTIVE……Page 46
2.3.1 SINGLE-FIBER CONNECTORS……Page 48
2.3.1.1.1 Solid Cylinder–Solid Bore……Page 49
2.3.1.1.4 Tapered Cylinder/Bore (Biconic)……Page 52
2.3.1.2 Tuning……Page 53
2.3.1.3 Z-Axis Alignment……Page 55
2.3.1.4 Splices……Page 57
2.3.2.1 Alignment by Planar Features……Page 58
2.3.2.3 Guide Pin/Hole Ferrules……Page 60
2.4 FERRULE-LESS CONNECTORS……Page 61
2.5 BACK PLANE CONNECTORS……Page 63
2.5 CONCLUSION……Page 65
REFERENCES……Page 66
CONTENTS……Page 68
3.2 ADVANTAGES OF SILICON WAFERBOARD……Page 69
3.3 MECHANICAL PASSIVE ALIGNMENT……Page 71
3.4 WAFER FABRICATION……Page 72
3.4.1.1 Plasma Etching……Page 73
3.4.1.2 RIE Etching Chemistries……Page 76
3.4.1.3 RIE Etched Silicon Structures for Passive Alignment……Page 77
3.4.1.4 Passive Alignment Structures and Accuracy……Page 79
3.4.2 SILICON ANISOTROPIC WET ETCHING……Page 81
3.4.2.2 EPW Solutions……Page 82
3.4.2.3 Inorganic Aqueous Alkaline Solutions……Page 84
3.4.2.4 TMAH Solutions……Page 86
3.4.2.5 Crystallographic Orientation Effect……Page 87
3.4.2.6 Etching Hillocks……Page 90
3.4.2.7 Temperature Dependence of Etch Rates……Page 92
3.5 CHIP NOTCHING FOR SILICON WAFERBOARD MOUNTING……Page 95
3.6 PROCESS CONTROLS……Page 96
3.7 DIE-BONDING ASSEMBLY……Page 97
3.8 WAFER SCALE TESTING……Page 100
3.9 WAFER SCALE BURN IN……Page 101
3.10 FIBER ATTACH……Page 102
3.11.1 BIDIRECTIONAL LINKS……Page 103
3.11.2 SURFACE EMITTERS AND DETECTORS……Page 105
3.11.3 HIGH-SPEED PACKAGING DESIGN USING SILICON WAFERBOARD……Page 106
3.11.4 CONNECTORIZED LOW-COST LASER……Page 108
REFERENCES……Page 109
4.1 INTRODUCTION……Page 116
4.2 OPTICAL COUPLING OF III–V SINGLE-MODE DEVICES……Page 117
4.2.1 COUPLING LOSSES……Page 118
4.2.2 EFFICIENT PACKAGING OF SINGLE-MODE DEVICES……Page 122
4.3 PRINCIPLE OF SI V-GROOVE SELF-ALIGNMENT TECHNIQUE……Page 125
4.3.1 OPTICAL ALIGNMENT……Page 126
4.3.2 ELECTRICAL CONNECTION……Page 131
4.4.1 SPACE SWITCH MATRICES……Page 134
4.4.2 LASER ARRAYS……Page 138
4.4.3 TILTED AMPLIFIER ARRAYS……Page 144
4.4.4 CHIP-TO-CHIP COUPLING……Page 149
4.4.5 DEVICE PACKAGING USING A SIMILAR ALIGNMENT PRINCIPLE……Page 152
4.5 SUMMARY……Page 154
REFERENCES……Page 155
5.1 INTRODUCTION……Page 161
5.2.1 SOLDER ASSEMBLY WITH NO PRECISION SELF-ALIGNMENTS……Page 163
5.2.2 SELF-ALIGNED SOLDER ASSEMBLY WITH NO MECHANICAL STOPS……Page 166
5.2.3 SELF-ALIGNED SOLDER ASSEMBLY WITH ONE MECHANICAL STOP……Page 169
5.2.4 SELF-ALIGNED SOLDER ASSEMBLY WITH TWO MECHANICAL STOPS……Page 170
5.3.1 BUMPING TECHNIQUE……Page 171
5.3.2 STRIPE-TYPE BUMP BONDING……Page 173
5.3.3.1 PD Array Module……Page 175
5.3.3.2 LD Array Module……Page 177
5.3.3.3 4 × 4 Optical Matrix Switch Module……Page 178
5.4 CRITICAL ISSUES……Page 180
5.4.1 SOLDER MATERIAL AND DEPOSITION……Page 181
5.4.2 SOLDER REFLOW……Page 184
5.4.3 SOLDER DESIGN……Page 186
5.4.4 SOLDER RELIABILITY……Page 188
5.5 CONCLUSIONS……Page 191
REFERENCES……Page 192
6.1 INTRODUCTION……Page 198
6.2.1 LEADFRAME MODULE PACKAGE……Page 199
6.2.2 OPTICAL COUPLER……Page 200
6.2.3 CHIPS……Page 201
6.2.4 JITNEY CABLE……Page 203
6.2.5 PASSIVE ALIGNMENT CONSIDERATIONS FOR PACKAGING……Page 205
6.2.6 ALIGNMENT STUDIES……Page 206
6.3.1.1 Laser Driver……Page 207
6.3.1.3 VCSEL……Page 209
6.4 JITNEY TESTBEDS……Page 210
6.4.1 OETC PROTOTYPE TESTBED……Page 211
6.4.3 POWER PARALLEL SWITCH TESTBED……Page 212
REFERENCES……Page 214
7.1 INTRODUCTION……Page 216
7.2.1 ALIGNMENT TOLERANCE……Page 218
7.2.2.1 Kinematic Design……Page 222
7.2.2.2 Deflection Control……Page 224
7.2.2.3 Fine Motion……Page 227
7.2.2.4 Long-Term Stability……Page 228
7.3.1 SILICON AND GLASS SUBSTRATES……Page 232
7.3.2 MACHINED CERAMICS……Page 234
7.3.4 PRECISION GAGE PINS AND BLOCKS……Page 235
7.4 MODULE ASSEMBLY……Page 236
7.4.1 OPTICAL POWER SUPPLY MODULE (LASER PEN)……Page 237
7.4.2 SURFACE ACTIVE DEVICE ASSEMBLY……Page 238
7.4.3 FIBER ARRAY ASSEMBLY……Page 239
7.4.4 MICROLENS ARRAY ASSEMBLY……Page 240
7.5 PASSIVE-ALIGNER APPARATUS……Page 241
7.6 SUMMARY……Page 244
ACKNOWLEDGMENTS……Page 245
REFERENCES……Page 246
Section 2: Visual Passive Alignment……Page 250
CONTENTS……Page 251
8.1 INTRODUCTION……Page 252
8.2.1 MECHANICAL CONTACT ALIGNMENT……Page 253
8.2.2 SOLDER-BUMP ALIGNMENT METHOD……Page 254
8.2.3 INDEX ALIGNMENT METHOD……Page 255
8.3.1.1.1 Formation……Page 256
8.3.1.1.2 Self-Alignment Accuracy and Shear Strength……Page 257
8.3.1.2 Frequency Response……Page 258
8.3.1.3 Optical Modules Using Ferrule-Integrated Platform……Page 262
8.3.2.1 Requirements for Packaging High-Speed Optical Devices……Page 265
8.3.2.2.1 Structure and Features……Page 266
8.3.2.2.3 Fabrication and Assembly Process……Page 268
8.3.2.2.4 Photoreceiver Characteristics……Page 269
8.3.2.3.1 Structure and Features……Page 270
8.3.2.3.2 Design……Page 271
8.3.2.3.3 Fabrication and Assembly……Page 272
8.3.2.3.4 Receiver Characteristics……Page 273
8.4.1.1 Basic Structure and Fabrication Process of PLC Platform……Page 274
8.4.1.2 Index Alignment for PLC Platform……Page 276
8.4.1.3 Multichip Integration on PLC Platform……Page 277
8.4.2.1 Optical Wavelength Division Multiplexing Transceiver Module……Page 278
8.4.2.2 External Cavity LD Module……Page 280
8.4.3.2 Hybrid Integration Technologies for High-Speed Applications……Page 283
8.4.3.3 10-Gbit/sec Hybrid Integrated Transmitter Using Solder Bump Technology……Page 286
REFERENCES……Page 288
CONTENTS……Page 292
9.1 PASSIVE ALIGNMENT FOR SURFACE MOUNT PACKAGING……Page 293
9.2.1 VISUAL ALIGNMENT……Page 294
9.2.2 FABRICATION PROCESS OF SILICON SUBSTRATE……Page 298
9.2.3 OPTICAL COUPLING DESIGN……Page 299
9.2.4 LENS DESIGN……Page 300
9.2.5 MODULE DESIGN……Page 302
9.2.5.1 Advantage in Manufacturing……Page 304
9.3 APPLICATION……Page 305
9.3.1 SMT LD MODULE……Page 306
9.3.2 PLC MODULE……Page 307
9.3.4 PLC MODULE……Page 308
9.3.5 LD-FIBER COUPLING AND MOUNTING ON PLC……Page 309
9.4 CHARACTERISTICS……Page 310
9.5 HIGH-PERFORMANCE AND LOW-COST PLASTIC PACKAGED OPTICAL MODULE AS AN APPLICATION OF THE PASSIVE OPTICAL ALIGNMENT METHOD……Page 312
9.6.1 STRUCTURE AND FABRICATION PROCESS……Page 313
9.6.2 PERFORMANCES……Page 316
9.6.3 HIGHER-POWER VERSION……Page 318
9.7.1 PLASTIC SEALING……Page 320
9.7.2 THERMAL RESISTANCE……Page 321
9.8 RELIABILITY……Page 322
REFERENCES……Page 323
Section 3: Utilities for Passive Alignment……Page 326
10.1 INTRODUCTION……Page 327
10.2.1.1 Dilute Guides……Page 330
10.2.1.2 Lateral Tapers……Page 331
10.2.1.2.2 Results……Page 334
10.3.1 ETCHING……Page 337
10.3.2 GROWTH……Page 338
10.4 COMBINED TAPERS……Page 340
10.5 SEPARATE BEAM EXPANSION REGIONS……Page 341
10.7 PRECISION CLEAVING OF LARGE SPOT LASERS……Page 345
10.8 SILICON OPTICAL BENCH……Page 346
10.9 LASER DIE BONDING……Page 347
10.11 COUPLING RESULTS USING LARGE SPOT LASERS……Page 348
10.12 WIDER APPLICATIONS……Page 350
REFERENCES……Page 353
CONTENTS……Page 357
11.1.1 THE MONTE CARLO METHOD……Page 359
11.1.2 MANUFACTURING FLOW NETWORKS, DESIGN VARIABLES, AND YIELD……Page 360
11.1.3 PASSIVE ALIGNMENT, OPTOELECTRONIC ASSEMBLY, AND PACKAGING……Page 365
11.1.3.1 Passive vs. Active Alignment……Page 366
11.1.3.2 Binning……Page 367
11.1.3.3 Yield, Performance, and Cost Trade-Offs……Page 368
11.2.1 @RISK AND CRYSTAL BALL……Page 369
11.2.4 PROGRAMMING LANGUAGES……Page 371
11.3 BASIC METHOD……Page 374
11.3.1 DISTRIBUTIONS AND THE ESTIMATION OF PARAMETERS……Page 375
11.3.2 Optical Coupling Models……Page 377
11.3.3 ERROR ESTIMATION……Page 379
11.3.4.1 Origin of Correlation Effects……Page 382
11.3.4.3 Yield and Correlated Output Variables……Page 383
11.3.5 ANALYTICAL SOLUTIONS……Page 384
11.4.1.1 Laser/Fiber……Page 386
11.4.1.2 Fiber/Detector……Page 393
11.4.2 MULTIMODE PASSIVE ALIGNMENT……Page 397
11.5.1 LIMITATIONS OF MONTE CARLO ANALYSIS……Page 398
11.5.2.4 DFB Lasers for ITU Grid Applications……Page 399
REFERENCES……Page 400