Modern processor design: fundamentals of superscalar processors

John Paul Shen, Mikko H. Lipasti0070590338, 9780070590335, 0070570647, 9780070570641, 0071230076, 9780071230070, 0072829680, 9780072829686, 0071244875, 9780071244879

Conceptual and precise, Modern Processor Design brings together numerous microarchitectural techniques in a clear, understandable framework that is easily accessible to both graduate and undergraduate students. Complex practices are distilled into foundational principles to reveal the authors’ insights and hands-on experience in the effective design of contemporary high-performance micro-processors for mobile, desktop, and server markets. Key theoretical and foundational principles are presented in a systematic way to ensure comprehension of important implementation issues.
The text presents fundamental concepts and foundational techniques such as processor design, pipelined processors, memory and I/O systems, and especially superscalar organization and implementations. Two case studies and an extensive survey of actual commercial superscalar processors reveal real-world developments in processor design and performance. A thorough overview of advanced instruction flow techniques, including developments in advanced branch predictors, is incorporated. Each chapter concludes with homework problems that will institute the groundwork for emerging techniques in the field and an introduction to multiprocessor systems.

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Table of contents :
1. Processor Design
The Evolution of Microprocessors / Instruction Set Processor Design / Principles of Processor Performance / Instruction-Level Parallel Processing / Summary
2. Pipelined Processors
Pipelining Fundamentals / Pipelined Processor Design / Deeply Pipelined Processors / Summary
3. Memory and I/O Systems
Introduction / Computer System Overview / Key Concepts: Latency and Bandwidth / Memory Hierarchy / Virtual Memory Systems / Memory Hierarchy Implementation / Input/Output Systems / Summary
4. Superscalar Organization
Limitations of Scalar Pipelines / From Scalar to Superscalar Pipelines / Superscalar Pipeline Overview / Summary
5. Superscalar Techniques
Instruction Flow Techniques / Register Data Flow Techniques / Memory Data Flow Techniques / Summary
6. The PowerPC 620
Introduction / Experimental Framework / Instruction Fetching / Instruction Dispatching / Instruction Execution / Instruction Completion / Conclusions and Observations / Bridging to the IBM POWER3 and POWER4 / Summary
7. Intel’s P6 Microarchitecture
Introduction / Pipelining / The In-Order Front End / The Out-of-Order Core / Retirement / Memory Subsystem / Summary / Acknowledgments
8. Survey of Superscalar Processors
Development of Superscalar Processors / A Classification of Recent Designs / Processor Descriptions / Verification of Superscalar Processors / Acknowledgments
9. Advanced Instruction Flow Techniques
Introduction / Static Branch Prediction Techniques / Dynamic Branch Prediction Techniques / Hybrid Branch Predictors / Other Instruction Flow Issues and Techniques / Summary
10. Advanced Register Data Flow Techniques
Introduction / Value Locality and Redundant Execution / Exploiting Value Locality without Speculation / Exploiting Value Locality with Speculation / Summary
11. Executing Multiple Threads
Introduction / Synchronizing Shared-Memory Threads / Introduction to Multiprocessor Systems / Explicitly Multithreaded Processors / Implicitly Multithreaded Processors / Executing the Same Thread / Summary