Cryptographic Hardware and Embedded Systems – CHES 2002: 4th International Workshop Redwood Shores, CA, USA, August 13–15, 2002 Revised Papers

Jean-Jacques Quisquater (auth.), Burton S. Kaliski, çetin K. Koç, Christof Paar (eds.)3540004092, 9783540004097

ThesearetheproceedingsofCHES2002,theFourthWorkshoponCryptographic Hardware and Embedded Systems. After the ?rst two CHES Workshops held in Massachusetts, and the third held in Europe, this is the ?rst Workshop on the West Coast of the United States. There was a record number of submissions this year and in response the technical program was extended to 3 days. As is evident by the papers in these proceedings, there have been again many excellent submissions. Selecting the papers for this year’s CHES was not an easy task, and we regret that we could not accept many contributions due to the limited availability of time. There were 101 submissions this year, of which 39 were selected for presentation. We continue to observe a steady increase over previous years: 42 submissions at CHES ’99, 51 at CHES 2000, and 66 at CHES 2001. We interpret this as a continuing need for a workshop series that c- bines theory and practice for integrating strong security features into modern communicationsandcomputerapplications. Inadditiontothesubmittedcont- butions, Jean-Jacques Quisquater (UCL, Belgium), Sanjay Sarma (MIT, USA) and a panel of experts on hardware random number generation gave invited talks. As in the previous years, the focus of the Workshop is on all aspects of cr- tographic hardware and embedded system security. Of special interest were c- tributionsthatdescribenewmethodsfore?cienthardwareimplementationsand high-speed software for embedded systems, e. g. , smart cards, microprocessors, DSPs, etc. CHES also continues to be an important forum for new theoretical and practical ?ndings in the important and growing ?eld of side-channel attacks.

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Table of contents :
CHES: Past, Present, and Future….Pages 1-1
Optical Fault Induction Attacks….Pages 2-12
Template Attacks….Pages 13-28
The EM Side—Channel(s)….Pages 29-45
Enhanced Montgomery Multiplication….Pages 46-56
New Algorithm for Classical Modular Inverse….Pages 57-70
Increasing the Bitlength of a Crypto-Coprocessor….Pages 71-81
Enhancing Simple Power-Analysis Attacks on Elliptic Curve Cryptosystems….Pages 82-97
Implementation of Elliptic Curve Cryptography with Built-In Counter Measures against Side Channel Attacks….Pages 98-113
Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor….Pages 114-128
Address-Bit Differential Power Analysis of Cryptographic Schemes OK-ECDH and OK-ECDSA….Pages 129-143
2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis….Pages 144-158
Efficient Software Implementation of AES on 32-Bit Platforms….Pages 159-171
An Optimized S-Box Circuit Architecture for Low Power AES Design….Pages 172-186
Simplified Adaptive Multiplicative Masking for AES….Pages 187-197
Multiplicative Masking and Power Analysis of AES….Pages 198-212
Keeping Secrets in Hardware: The Microsoft Xbox TM Case Study….Pages 213-227
A DPA Attack against the Modular Reduction within a CRT Implementation of RSA….Pages 228-243
Further Results and Considerations on Side Channel Attacks on RSA….Pages 244-259
Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures….Pages 260-275
Some Security Aspects of the MIST Randomized Exponentiation Algorithm….Pages 276-290
The Montgomery Powering Ladder….Pages 291-302
DPA Countermeasures by Improving the Window Method….Pages 303-317
Efficient Subgroup Exponentiation in Quadratic and Sixth Degree Extensions….Pages 318-332
On the Efficient Generation of Elliptic Curves over Prime Fields….Pages 333-348
An End-to-End Systems Approach to Elliptic Curve Cryptography….Pages 349-365
A Low-Power Design for an Elliptic Curve Digital Signature Chip….Pages 366-380
Genus Two Hyperelliptic Curve Coprocessor….Pages 381-399
True Random Number Generator Embedded in Reconfigurable Hardware….Pages 400-414
Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications….Pages 415-430
A Hardware Random Number Generator….Pages 431-449
RFID Systems and Security and Privacy Implications….Pages 450-453
A New Class of Invertible Mappings….Pages 454-469
Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2 n )….Pages 470-483
Dual-Field Arithmetic Unit for GF ( p ) and GF (2 m )….Pages 484-499
Error Detection in Polynomial Basis Multipliers over Binary Extension Fields….Pages 500-514
Hardware Implementation of Finite Fields of Characteristic Three….Pages 515-528
Preventing Differential Analysis in GLV Elliptic Curve Scalar Multiplication….Pages 529-539
Randomized Signed-Scalar Multiplication of ECC to Resist Power Attacks….Pages 540-550
Fast Multi-scalar Multiplication Methods on Elliptic Curves with Precomputation Strategy Using Montgomery Trick….Pages 551-563
Experience Using a Low-Cost FPGA Design to Crack DES Keys….Pages 564-578
A Time-Memory Tradeo. Using Distinguished Points: New Analysis & FPGA Results….Pages 579-592
….Pages 593-609