Fabless Semiconductor Implementation

Rakesh Kumar9780071502665, 0071502661

Discover How to Launch and Succeed as a Fabless Semiconductor Firm
Fabless Semiconductor Implementation takes you step-by-step through the challenges faced by fabless firms in the development of integrated circuits. This expert guide examines the potential pitfalls of IC implementation in the rapidly growing fabless segment of the semiconductor industry and elaborates how to overcome these difficulties. It provides a comprehensive overview of the issues that executives and technical professionals encounter at fabless companies.
Filled with over 150 on-target illustrations, this business-building tool presents a clear picture of the entire lifecycle of a fabless enterprise, describing how to envision and execute fabless IC implementation.
Inside This Comprehensive Guide to Fabless IC Design
– Define and specify the product Understand the customer requirements, the value chain, and the supply chain Select the right implementation approach, including “make” vs. “buy” Choose the best technologies and supply chain Implement IC design, fabrication, and manufacturing Build the operations infrastructure to meet cost and quality requirements Program-manage the distributed supply chain

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Table of contents :
Contents……Page 9
Preface……Page 13
Why This Book?……Page 17
Acknowledgments……Page 19
1.1 Semiconductor Industry……Page 23
1.2 Fabless Industry……Page 40
1.3 Key Points……Page 52
2.1 Electronics Markets……Page 53
2.2 The Global Opportunity……Page 57
2.3 Some Challenges in Today’s Electronics Marketplace……Page 58
2.4 Understanding the Value Chain……Page 59
2.5 Customer Needs……Page 61
2.6 Overview of Fabless Company Development Activities……Page 62
2.7 Key Points……Page 68
3.1 Getting Started……Page 69
3.3 Funding Process……Page 76
3.4 Development Cycle—the Four Phases……Page 80
3.5 Roadmap of Products……Page 84
3.7 Long Range Strategies……Page 87
3.8 Key Points……Page 88
4.1 FPGA, Gate Array ASICs, Semi-custom ASICs……Page 89
4.2 If You Had a Fab (IDM)……Page 95
4.3 Fabless Sourcing Models (ASSP, COT, ASIC)……Page 98
4.4 Design Strategies……Page 108
4.5 Key Points……Page 120
5.1 Introduction……Page 121
5.2 Considerations to Pick the Right Technology……Page 123
5.3 Cost per Function (CPF)……Page 124
5.4 CPF Reduction from Technology Scaling……Page 126
5.5 Die Cost Reduction by Increasing Wafer Size……Page 131
5.6 Foundry Financials and Technologies……Page 135
5.7 Process Technologies……Page 137
5.8 CMOS Challenges……Page 149
5.9 The Design Ecosystem……Page 153
5.10 Process Alternatives……Page 171
5.11 Nanotechnology Co-design Solutions……Page 173
5.12 Packaging Considerations……Page 179
5.13 Key Points……Page 196
6.1 Introduction……Page 197
6.2 Design Flow and Supply Chain……Page 198
6.3 Implementation Time Line……Page 207
6.4 Silicon Prototyping and Production……Page 208
6.5 Packaging Considerations……Page 216
6.6 Test Considerations……Page 218
6.7 Quality and Reliability Considerations……Page 219
6.8 Supply Chain Considerations……Page 220
6.9 Operations Best Practices……Page 227
6.10 Operations Effort and Resources……Page 228
6.11 Resource Skill Sets……Page 229
6.12 Production Operations Activities and Processes……Page 232
6.13 Key Points……Page 238
7.1 Unit Cost Estimation……Page 239
7.2 Optimizing the Die Size and Packing Density per Chip……Page 251
7.3 Development Cost……Page 254
7.4 Development and Operations Costs……Page 265
7.6 Some Cost Tradeoffs……Page 268
7.7 Key Points……Page 269
8 Managing Quality……Page 271
8.1 Quality Manual……Page 274
8.2 Documentation System……Page 276
8.3 Quality in the Development Phase……Page 277
8.4 IC Quality and Reliability Qualification……Page 278
8.5 Manufacturing Quality……Page 288
8.6 Customer Support……Page 289
8.7 Key Points……Page 290
9.1 Management at the Vertically Integrated Company……Page 291
9.2 Management of the Distributed Supply Chain……Page 292
9.3 Comparison of Management Processes……Page 296
9.5 Program Management……Page 297
9.6 Risk Management……Page 299
9.7 Design Productivity……Page 300
9.8 Key Points……Page 302
10.1 Industry Stratification and Opportunities……Page 303
10.2 Funding……Page 305
10.3 Alternatives to the IDM Model……Page 306
10.4 Virtual “Re-Integration”/IFM……Page 309
10.6 Managing Innovation……Page 314
10.7 The Role of Research Organizations……Page 315
10.8 Key Points……Page 319
A.1 Business Plan Example……Page 321
A.2 Term Sheet Outline……Page 322
B.1 Transistor Scaling……Page 323
B.2 Yield Models……Page 325
B.3 Quality……Page 327
C……Page 329
E……Page 330
H……Page 331
M……Page 332
N……Page 333
R……Page 334
S……Page 335
V……Page 336
Y……Page 337
Acronyms……Page 339
Bibliography……Page 343
Index……Page 351
C……Page 353
F……Page 354
M……Page 355
P……Page 356
S……Page 357
Y……Page 358