Algorithm Engineering and Experimentation: International Workshop ALENEX’99 Baltimore, MD, USA, January 15–16, 1999 Selected Papers

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Series: Lecture Notes in Computer Science 1619

ISBN: 3540662278, 9783540662273

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Ruy Luiz Milidiú, Artur Alves Pessoa, Eduardo Sany Laber (auth.), Michael T. Goodrich, Catherine C. McGeoch (eds.)3540662278, 9783540662273

Symmetric multiprocessors (SMPs) dominate the high-end server market and are currently the primary candidate for constructing large scale multiprocessor systems. Yet, the design of e cient parallel algorithms for this platform c- rently poses several challenges. The reason for this is that the rapid progress in microprocessor speed has left main memory access as the primary limitation to SMP performance. Since memory is the bottleneck, simply increasing the n- ber of processors will not necessarily yield better performance. Indeed, memory bus limitations typically limit the size of SMPs to 16 processors. This has at least twoimplicationsfor the algorithmdesigner. First, since there are relatively few processors availableon an SMP, any parallel algorithm must be competitive with its sequential counterpart with as little as one processor in order to be r- evant. Second, for the parallel algorithm to scale with the number of processors, it must be designed with careful attention to minimizing the number and type of main memory accesses. In this paper, we present a computational model for designing e cient al- rithms for symmetric multiprocessors. We then use this model to create e cient solutions to two widely di erent types of problems – linked list pre x com- tations and generalized sorting. Both problems are memory intensive, but in die rent ways. Whereas generalized sorting algorithms typically require a large numberofmemoryaccesses, they areusuallytocontiguousmemorylocations. By contrast, prex computation algorithms typically require a more modest qu- tity of memory accesses, but they are are usually to non-contiguous memory locations.

Table of contents :
Efficient Implementation of the WARM-UP Algorithm for the Construction of Length-Restricted Prefix Codes….Pages 1-17
Implementing Weighted b -Matching Algorithms: Insights from a Computational Study….Pages 18-36
Designing Practical Efficient Algorithms for Symmetric Multiprocessors….Pages 37-56
Circular Drawings of Biconnected Graphs….Pages 57-73
Heuristics and Experimental Design for Bigraph Crossing Number Minimization….Pages 74-93
Binary Space Parititions in Plücker Space….Pages 94-113
Practical Point-in-Polygon Tests Using CSG Representations of Polygons….Pages 114-128
Accessing the Internal Organization of Data Structures in the JDSL Library….Pages 129-144
Object-Oriented Design of Graph Oriented Data Structures….Pages 145-160
A Case Study on the Cost of Geometric Computing….Pages 161-181
Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning….Pages 182-198
Algorithms for Restoration Planning in a Telecommunications Network….Pages 199-214
Computing the n × m Shortest Paths Efficiently….Pages 215-229
Image Watermarking for Copyright Protection….Pages 230-249
A Self Organizing Bin Packing Heuristic….Pages 250-269
Finding the Right Cutting Planes for the TSP….Pages 270-285
Obstacle-Avoiding Euclidean Steiner Trees in the Plane: An Exact Algorithm….Pages 286-299
Adaptive Algorithms for Cache-efficient Trie Search….Pages 300-315
Fast Priority Queues for Cached Memory….Pages 316-321
Efficient Bulk Operations on Dynamic R-trees….Pages 322-341

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