Daniel Cociorva, Gerald Baumgartner (auth.), Bill Pugh, Chau-Wen Tseng (eds.)3540307818, 9783540307815
Table of contents :
Front Matter….Pages –
Memory-Constrained Communication Minimization for a Class of Array Computations….Pages 1-15
Forward Communication Only Placements and Their Use for Parallel Program Construction….Pages 16-30
Hierarchical Parallelism Control for Multigrain Parallel Processing….Pages 31-44
Compiler Analysis and Supports for Leakage Power Reduction on Microprocessors….Pages 45-60
Automatic Detection of Saturation and Clipping Idioms….Pages 61-74
Compiler Optimizations with DSP-Specific Semantic Descriptions….Pages 75-89
Combining Performance Aspects of Irregular Gauss-Seidel Via Sparse Tiling….Pages 90-110
A Hybrid Strategy Based on Data Distribution and Migration for Optimizing Memory Locality….Pages 111-125
Compiler Optimizations Using Data Compression to Decrease Address Reference Entropy….Pages 126-141
Towards Compiler Optimization of Codes Based on Arrays of Pointers….Pages 142-156
An Empirical Study on the Granularity of Pointer Analysis in C Programs….Pages 157-171
Automatic Implementation of Programming Language Consistency Models….Pages 172-187
Parallel Reductions: An Application of Adaptive Algorithm Selection….Pages 188-202
Adaptively Increasing Performance and Scalability of Automatically Parallelized Programs….Pages 203-217
Selector: A Language Construct for Developing Dynamic Applications….Pages 218-232
Optimizing the Java Piped I/O Stream Library for Performance….Pages 233-248
A Comparative Study of Stampede Garbage Collection Algorithms….Pages 249-264
Compiler and Runtime Support for Shared Memory Parallelization of Data Mining Algorithms….Pages 265-279
Performance Analysis of Symbolic Analysis Techniques for Parallelizing Compilers….Pages 280-294
Efficient Manipulation of Disequalities During Dependence Analysis….Pages 295-308
Removing Impediments to Loop Fusion Through Code Transformations….Pages 309-328
Near-Optimal Padding for Removing Conflict Misses….Pages 329-343
Fine-Grain Stacked Register Allocation for the Itanium Architecture….Pages 344-361
Evaluating Iterative Compilation….Pages 362-376
Back Matter….Pages –
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