Embedded Systems and Computer Architecture

Graham R Wilson9780750650649, 07506-5064-8

The author has taught the design and use of microprocessor systems to undergraduate and technician level students for over 25 years.*A core text for academic modules on microprocessors, embedded systems and computer architecture*A practical design-orientated approach*FREE CD-ROM features a unique microprocessor simulator, and accompanying website contains solutions, FAQs and updates to software

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Table of contents :
Contents……Page 6
Preface……Page 12
Notation used in the text……Page 14
1.1 Numbers within a computing machine……Page 18
1.3 Representing signed integers……Page 20
1.4 Addition and subtraction of signed integers……Page 21
1.6 Use of hexadecimal representation……Page 23
1.7 Problems……Page 24
2.1 Logic –
the bank vault……Page 27
2.2 Evaluating the logic expression for the bank vault……Page 28
2.3 Another solution……Page 30
2.4 Simplifying logical expressions*……Page 31
2.5 Rules for simplifying logical expressions using a map*……Page 34
2.6 Karnaugh-Veitch program, KVMap*……Page 38
2.7 Quine-
McCluskey method*……Page 40
2.8 Problems……Page 45
3.2 Development of the bank vault controller design……Page 48
3.3 Gates –
electronic circuits that perform logical operations……Page 49
3.4 Decoder circuit……Page 51
3.5 Multiplexer circuit……Page 52
3.6 Flip-flops……Page 54
3.8 State machines*……Page 56
3.9 Programmable logic devices*……Page 62
3.10 Problems……Page 63
4.1 Circuit to add numbers……Page 67
4.2 Adder/Subtractor……Page 68
4.3 Arithmetic and logic unit……Page 69
4.4 Shifting data……Page 71
4.4 Fast adders*……Page 73
4.5 Floating-point numbers*……Page 75
4.6 Problems……Page 82
5.1 A manual computing system……Page 86
5.3 Connecting the machine components……Page 89
5.4 Architecture of Simple Machine……Page 90
5.5 More general view of the design of Simple Machine*……Page 92
5.6 Improvements to Simple Machine……Page 96
5.7 Architecture of the G80 microprocessor……Page 99
5.8 Problems……Page 100
6.1 Programmer’s model
……Page 101
6.2 Instruction format and addressing modes……Page 102
6.3 Converting the code to machine code – manual assembly
……Page 104
6.4 Using the assembler……Page 105
6.5 Assembly language……Page 106
6.6 Types of instruction……Page 107
6.7 Problems……Page 112
7.1 Program control structures
……Page 115
7.2 Data structures……Page 120
7.3 Subroutines……Page 132
7.4 Problems……Page 137
8.2 Read-only memory device –
ROM……Page 140
8.3 COMP1 computer –
G80 with ROM only……Page 142
8.4 RAM device……Page 145
8.5 COMP2 computer –
G80 with ROM and RAM……Page 146
8.6 COMP3 computer……Page 149
8.7 Microprocessor control signals……Page 151
8.8 Problems……Page 152
9.1 Simple output port
……Page 153
9.2 Port address space……Page 155
9.4 Programmable ports*……Page 157
9.5 Serial data –
UART*……Page 160
9.6 Problems……Page 162
10.2 Handshaking……Page 163
10.3 Simple output to a slow device……Page 166
10.4 Do-forever loop……Page 167
10.5 Processor interrupt……Page 168
10.6 Possible interrupt mechanisms……Page 169
10.7 Interrupt priority mechanisms……Page 172
10.9 G80 interrupt mechanisms……Page 174
10.10 Direct memory access……Page 182
10.11 Problems……Page 184
11.1 Counter device and its use in a conveyor belt……Page 187
11.2 Timer device……Page 188
11.4 Pottery kiln……Page 192
11.5 Multitasking*……Page 193
11.6 Problems……Page 198
12.1 How an assembler works……Page 200
12.2 Linker……Page 206
12.3 Intel format file……Page 209
12.5 Problems……Page 210
13.2 Register transfers……Page 211
13.3 Instruction fetch……Page 213
13.4 Examples of instruction execution……Page 214
13.5 Hardwired controller……Page 219
13.6 More about the hardwired controller……Page 220
13.7 Microprogrammed control……Page 221
13.8 Problems……Page 226
14.1 General-purpose computers……Page 230
14.3 Storage within a computer……Page 231
14.4 Data bus width and memory address space……Page 232
14.6 Organization of 32- bit memory……Page 233
14.9 Operating systems……Page 237
15.1 Basic operation of cache……Page 240
15.2 Cache organization –
direct mapping……Page 242
15.3 Cache organization –
set- associative mapping……Page 245
15.4 Cache organization –
fully associative mapping……Page 247
15.5 Problems……Page 249
16.1 Virtual and physical addresses –
imaginary and real memory……Page 250
16.3 Page Tables……Page 251
16.4 Handling a page fault……Page 253
16.6 Two-level paging*……Page 256
16.8 Memory protection……Page 258
16.9 Problems……Page 259
Appendix A: G80 instruction set……Page 260
Appendix B: ASCII character codes……Page 276
Appendix C: Specifications of the input and output devices……Page 277
1 Format of the assembly source program……Page 299
2 Symbols and expressions……Page 300
3 Assembler directives……Page 302
4 Linker command……Page 305
Index
……Page 306