Abd-El-Barr M., El-Rewini H.0471467405, 0471467413
Table of contents :
Team DDU……Page 1
Contents……Page 10
Preface……Page 14
1. Introduction to Computer Systems……Page 18
1.1. Historical Background……Page 19
1.2. Architectural Development and Styles……Page 21
1.3. Technological Development……Page 22
1.4. Performance Measures……Page 23
1.5. Summary……Page 28
Exercises……Page 29
References and Further Reading……Page 31
2.1. Memory Locations and Operations……Page 32
2.2. Addressing Modes……Page 35
2.3. Instruction Types……Page 43
2.4. Programming Examples……Page 48
2.5. Summary……Page 50
Exercises……Page 51
References and Further Reading……Page 52
3. Assembly Language Programming……Page 54
3.1. A Simple Machine……Page 55
3.2. Instructions Mnemonics and Syntax……Page 57
3.3. Assembler Directives and Commands……Page 60
3.4. Assembly and Execution of Programs……Page 61
3.5. Example: The X86 Family……Page 64
3.6. Summary……Page 72
Exercises……Page 73
References and Further Reading……Page 74
4.1. Number Systems……Page 76
4.2. Integer Arithmetic……Page 80
4.3 Floating-Point Arithmetic……Page 91
Exercises……Page 96
References and Further Reading……Page 98
5.1. CPU Basics……Page 100
5.2. Register Set……Page 102
5.3. Datapath……Page 106
5.4. CPU Instruction Cycle……Page 108
5.5. Control Unit……Page 112
Exercises……Page 121
References……Page 123
6.1. Basic Concepts……Page 124
6.2. Cache Memory……Page 126
6.3. Summary……Page 147
Exercises……Page 148
References and Further Reading……Page 150
7.1. Main Memory……Page 152
7.2. Virtual Memory……Page 159
7.3. Read-Only Memory……Page 173
Exercises……Page 175
References and Further Reading……Page 177
8. Input–Output Design and Organization……Page 178
8.1. Basic Concepts……Page 179
8.2. Programmed I/O……Page 181
8.3. Interrupt-Driven I/O……Page 184
8.4. Direct Memory Access (DMA)……Page 192
8.5. Buses……Page 194
8.6. Input–Output Interfaces……Page 198
8.7. Summary……Page 199
References and Further Reading……Page 200
9.1. General Concepts……Page 202
9.2. Instruction Pipeline……Page 204
9.3. Example Pipeline Processors……Page 218
9.4. Instruction-Level Parallelism……Page 224
9.5. Arithmetic Pipeline……Page 226
Exercises……Page 230
10 Reduced Instruction Set Computers (RISCs)……Page 232
10.1. RISC/CISC Evolution Cycle……Page 234
10.2. RISCs Design Principles……Page 235
10.3. Overlapped Register Windows……Page 237
10.4. RISCs Versus CISCs……Page 238
10.5. Pioneer (University) RISC Machines……Page 240
10.6. Example of Advanced RISC Machines……Page 244
10.7. Summary……Page 249
References and Further Reading……Page 250
11.1. Introduction……Page 252
11.2. Classification of Computer Architectures……Page 253
11.3. SIMD Schemes……Page 261
11.4. MIMD Schemes……Page 263
11.5. Interconnection Networks……Page 269
11.7. Summary……Page 271
Exercises……Page 272
References and Further Reading……Page 273
Index……Page 276
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